1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and in particular, to a method of manufacturing a semiconductor device having a MOS (Metal Oxide Semiconductor) structure.
2. Description of the Prior Art
Heretofore, in LSIs (Large Scale Integrated circuit), finer and higher integrated devices have been demanded. Due to the progress in the finer and higher integrated devices, the gate length of MOS transistors is further reduced, and as a result of this, the hot electron effect and the like are apt to be occurred.
Accordingly, in recent years, a MOS transistor structure having an LDD (Lightly Doped Drain) structure has been introduced. In the LDD structure, in order to suppress the occurrence of the hot electron effect, the impurity concentration of the source and drain in the vicinity of the gate side is reduced (a low concentration impurity region is formed), and the generation of hot carriers is disturbed by lowering electric field in these portions.
The MOS transistor having the above-mentioned LDD structure is generally manufactured by the following method.
First, a gate electrode is formed on a substrate interposed by a gate oxide film. Subsequently, impurity ions are introduced into both sides (source and drain regions) of a channel region by using the gate electrode as a mask, and low concentration impurity regions are formed in these portions. Then, side walls composed of silicon oxide film (SiO.sub.2 film) are formed on side surfaces of the gate electrode. At this time, in etching back the silicon oxide film, the surfaces of the substrate corresponding to the source and drain are exposed.
Next, the wafer is subjected to a thermal oxidation treatment in an oxidation atmosphere of O.sub.2 or H.sub.2 O at about 800.degree. to 900.degree. C. to Grow silicon oxide film on the whole surface of the source and drain regions, which serves as a buffer film at the time of impurity introduction to form a high concentration impurity region which is performed in a subsequent process.
Next, impurity ions are introduced into both sides of the side walls by using the side walls and the gate electrode as a mask to form high concentration impurity regions at these portions. By this impurity ion introduction, the source and drain regions are turned into amorphous.
Then, after depositing an interlayer insulating film on the whole surface of the wafer, a thermal treatment is performed at 800.degree. to 900.degree. C. in order to flatten the interlayer insulating film, and to recrystallize and activate the amorphous source and drain regions.
In this manner, the source and drain of the MOS transistor having the LDD structure was formed. Thereafter, a semiconductor device including the MOS transistor having the LDD structure is completed by performing desired processes.
In the manufacturing process of the MOS transistor having the LDD structure, it is known that at the time of performing anisotropic etching of the silicon oxide film in forming the side walls on the side surfaces of the gate electrode, the etching progresses to reach the substrate surfaces corresponding to the source and drain regions, and the substrate is etched and damaged.
However, in the above-mentioned conventional manufacturing method, the damaged wafer is thermally oxidized, and the silicon oxide film is formed to remove the damaged layer on the substrate. The silicon oxide film serves as a buffer film at the time of impurity introduction for the purpose of forming a high concentration impurity region which is performed in a subsequent process. However, a problem is raised anew in that, at this time, a volume expansion occurs in the oxidized semiconductor substrate, and the stress is concentrated in the periphery of edge portions of the side walls, and in the vicinity of edge portion of the field oxide film. Further, due to this stress concentration, a strain is produced in the substrate at a portion corresponding to the stress concentration, and a crystal defect is caused in an amorphous layer formed at the time of impurity introduction for the purpose of formation of a high concentration impurity region which is performed in a subsequent process. This defect remains after the introduction of the impurities, and the problem is caused in that a junction leakage occurs in the high concentration impurity region of the source and drain regions.
Furthermore, another problem is involved in that since the interlayer insulating film has been formed on the source and drain regions, at the time of thermal treatment which is performed in order to flatten the interlayer insulating film, and to both crystallize the portion transformed into the amorphous state, an undesired stress is imparted from the interlayer insulating film, and a stress is imparted between the interlayer insulating film and the substrate due to a thermal strain. And because of this stress, a defect is caused in edge portions of the side walls and in edge portion of the field oxide film, and a junction leakage is apt to be caused in the high concentration impurity region, and a defective device is resulted.